Project SCALE SoC: SoC design, verification, programming, and test Program Engineering First Time Researcher (FTR) Fellowship Term Spring 2025 Status Closed Research Area System on Chip Design, Integrated Circuit Testing, Embedded Systems Description System on Chip Extension Technologies (SoCET) is a long running chip design team intended primarily for undergraduates to get experience in as many aspects of chip design, fabrication, and test as possible. The team is organized like a small chip design company with sub-teams for logic design, verification, chip-layout, analog design, printed circuit board (PCB) design, test, software, and special research projects in collaboration with research groups in ECE. Special projects include applications in hardware security and GPU design. Based on your interests and background, team leaders will work with you to assign you to an appropriate sub-team or special project. Because of the wide range of projects, the experience and skill requirements for SoCET are flexible. Almost any kind of background in circuit design, logic design, circuit simulation, computer architecture, and microcontroller programming will be useful in some part of the team. For more details on possible projects and sub-teams, see https://engineering.purdue.edu/SoC-Team. Supervisor Tanya A Faltens Mentor Mark C Johnson Type of work required The expected contributions will depend on the area of the SoCET to which you are assigned. Depending on your background, part of the work will involve learning skills necessary to the assignment project. Possible contributions include creation of subsystems to be used in a future chip design, creation of circuit layouts for an IC design, writing software to be used on an existing System on Chip design, FPGA prototyping, design of printed circuit boards, for IC testing, or participation in research collaborations with other faculty. See https://engineering.purdue.edu/SoC-Team for more examples. Websites • https://nanohub.org/groups/scale/research_opportunities/research_purdue/ftr2025
• https://engineering.purdue.edu/SoC-Team
Qualifications Must be a SCALE student. Read more about SCALE and access the SCALE application link here: https://nanohub.org/groups/scale/learn_more. Once in SCALE, apply via the FTR portal: https://engineering.purdue.edu/Engr/Research/EURO/programs/ftr. Preferred Majors: Selected participants will usually be taken from electrical engineering, computer engineering, or computer science, but other majors will be considered if one has skills or experience directly relevant to chip design and testing. Required Experience and Skills: None except strong motivation and problem-solving ability. Desired experience: Desired skills and experience include digital design and simulation using Verilog, analog circuit design, printed circuit board design, computer processor design, IC testing, and microcontroller programming. Credit Hours 0 Weekly Hours 10 (estimated)